The present invention relates to linear CMOS amplifiers.
There is a strong need for power amplifiers to have linear characteristics. Unfortunately, most CMOS transistors often used in amplifier construction are inherently non-linear. Consequently, a technique for accomplishing linear amplification using nonlinear components is desired.
FIG. 1(a) shows a typical CMOS transistor used for amplification. FIG. 1(b) shows the nonlinear I-V (currentxe2x88x92voltage) relationship produced by the CMOS amplifier of FIG. 1(a). Equation 1 illustrates the relationship between transistor current IDS and gate voltage VGS.
IDS=xcexcCo(W/L)((VGSxe2x88x92VT)/2)2xe2x80x83xe2x80x83(1)
Let VGS=VGS+xcex94V sin(xcfx89t).
IDS=xcexcCo(W/L)((VGsxe2x88x92VT)+xcex94V sin(xcfx89t)2
IDS=xcexcCo(W/L)[(VGSxe2x88x92VT)2+2(VGSxe2x88x92VT)xcex94V sin(xcfx89t)+xcex94V sin2(xcfx89t)]
Using the trigonometry identity sin2(xcfx89t)=xc2xd(1xe2x88x92cos(2xcfx89t)),
IDS=xcexcCo(W/L)[(VGSxe2x88x92VT)2+2(VGSxe2x88x92VT)xcex94V sin(xcfx89t)+xcex94V2/2xe2x88x92xc2xdxcex94V2 cos(2xcfx89t)]
Which can be broken down into the components
IDS=Co(W/L)[(VGSxe2x88x92VT)2+xcex94V2/2xe2x80x83xe2x80x83(2)
xe2x80x83+2(VGSxe2x88x92VT)xcex94V sin(xcfx89t)xe2x80x83xe2x80x83(3)
xe2x88x92xc2xdxcex94V2 cos(2xcfx89t)]xe2x80x83xe2x80x83(4)
Equation 1 above represents the well-known square law characteristics of a transistor, where xcexc is electron mobility; Co is capacitance per unit area; W is channel width; L is channel length; xcfx89 is signal frequency, and xcex94V is signal magnitude. Equation component (2) represents the portions of the amplified signal that are DC components. Equation component (3) represents the portions of the input signal that are desired to be amplified. Equation component (4) represents the 2nd harmonic components of the amplified signal. A circuit which removes this unwanted harmonic distortion is desired to provide a more linear transistor output.
In one aspect the invention provides an apparatus and method which provides a linear CMOS amplifier using nonlinear components. The apparatus includes an NMOS transistor amplifier which has a nonlinear output, a PMOS transistor amplifier which also has a nonlinear output, where the NMOS and PMOS transistor amplifiers are connected to the same input source so that the nonlinearities are mirror images of each other, and one or more transformers for combining the outputs of the NMOS and PMOS transistor amplifiers, resulting in the cancellation of the mirror image nonlinearities and reducing the nonlinearity of the CMOS amplifier.